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Add missing runtime tests for SSE alias intrinsics #2041

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de85b1c
Add missing runtime tests for alias intrinsics: _mm_cvt_ss2si, _mm_cv…
ArunTamil21 Feb 26, 2026
b397dac
Refactor alias tests using meta function pattern and add missing test…
ArunTamil21 Feb 26, 2026
b5b01c0
Restore deleted test_mm_store_ps
ArunTamil21 Feb 26, 2026
1a3e798
Remove redundant tests for _mm_prefetch and _mm_undefined_ps
ArunTamil21 Feb 27, 2026
b7a5d2d
Refactor alias tests using macros instead of meta functions
ArunTamil21 Mar 12, 2026
6d1930f
Merge upstream/main and resolve conflict in x86-intel.rs
ArunTamil21 Mar 12, 2026
a4d7d29
Fix formatting
ArunTamil21 Mar 12, 2026
8c4d55c
Use macros for test body deduplication in SSE alias tests
ArunTamil21 Mar 17, 2026
66cc054
Fix formatting
ArunTamil21 Mar 17, 2026
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193 changes: 118 additions & 75 deletions crates/core_arch/src/x86/sse.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -2997,66 +2997,87 @@ mod tests {
}
}

macro_rules! test_mm_cvtss_si32_impl {
($alias:ident) => {
let inputs = &[42.0f32, -3.1, 4.0e10, 4.0e-20, NAN, 2147483500.1];
let result = &[42i32, -3, i32::MIN, 0, i32::MIN, 2147483520];
for i in 0..inputs.len() {
let x = _mm_setr_ps(inputs[i], 1.0, 3.0, 4.0);
let e = result[i];
let r = $alias(x);
assert_eq!(e, r, "TestCase #{} f({:?}) = {}, expected: {}", i, x, r, e);
}
};
}

#[simd_test(enable = "sse")]
fn test_mm_cvtss_si32() {
let inputs = &[42.0f32, -3.1, 4.0e10, 4.0e-20, NAN, 2147483500.1];
let result = &[42i32, -3, i32::MIN, 0, i32::MIN, 2147483520];
for i in 0..inputs.len() {
let x = _mm_setr_ps(inputs[i], 1.0, 3.0, 4.0);
let e = result[i];
let r = _mm_cvtss_si32(x);
assert_eq!(
e, r,
"TestCase #{} _mm_cvtss_si32({:?}) = {}, expected: {}",
i, x, r, e
);
}
unsafe fn test_mm_cvtss_si32() {
test_mm_cvtss_si32_impl!(_mm_cvtss_si32);
}

#[simd_test(enable = "sse")]
fn test_mm_cvttss_si32() {
let inputs = &[
(42.0f32, 42i32),
(-31.4, -31),
(-33.5, -33),
(-34.5, -34),
(10.999, 10),
(-5.99, -5),
(4.0e10, i32::MIN),
(4.0e-10, 0),
(NAN, i32::MIN),
(2147483500.1, 2147483520),
];
for (i, &(xi, e)) in inputs.iter().enumerate() {
let x = _mm_setr_ps(xi, 1.0, 3.0, 4.0);
let r = _mm_cvttss_si32(x);
assert_eq!(
e, r,
"TestCase #{} _mm_cvttss_si32({:?}) = {}, expected: {}",
i, x, r, e
);
}
unsafe fn test_mm_cvt_ss2si() {
test_mm_cvtss_si32_impl!(_mm_cvt_ss2si);
}

macro_rules! test_cvttss_si32_impl {
($alias:ident) => {
let inputs = &[
(42.0f32, 42i32),
(-31.4, -31),
(-33.5, -33),
(-34.5, -34),
(10.999, 10),
(-5.99, -5),
(4.0e10, i32::MIN),
(4.0e-10, 0),
(NAN, i32::MIN),
(2147483500.1, 2147483520),
];
for (i, &(xi, e)) in inputs.iter().enumerate() {
let x = _mm_setr_ps(xi, 1.0, 3.0, 4.0);
let r = $alias(x);
assert_eq!(e, r, "TestCase #{} f({:?}) = {}, expected: {}", i, x, r, e);
}
};
}

#[simd_test(enable = "sse")]
const fn test_mm_cvtsi32_ss() {
let a = _mm_setr_ps(5.0, 6.0, 7.0, 8.0);
unsafe fn test_mm_cvttss_si32() {
test_cvttss_si32_impl!(_mm_cvttss_si32);
}

let r = _mm_cvtsi32_ss(a, 4555);
let e = _mm_setr_ps(4555.0, 6.0, 7.0, 8.0);
assert_eq_m128(e, r);
#[simd_test(enable = "sse")]
unsafe fn test_mm_cvtt_ss2si() {
test_cvttss_si32_impl!(_mm_cvtt_ss2si);
}

let r = _mm_cvtsi32_ss(a, 322223333);
let e = _mm_setr_ps(322223333.0, 6.0, 7.0, 8.0);
assert_eq_m128(e, r);
macro_rules! test_mm_cvtsi32_ss_impl {
($alias:ident) => {
let a = _mm_setr_ps(5.0, 6.0, 7.0, 8.0);

let r = _mm_cvtsi32_ss(a, -432);
let e = _mm_setr_ps(-432.0, 6.0, 7.0, 8.0);
assert_eq_m128(e, r);
let r = $alias(a, 4555);
assert_eq_m128(_mm_setr_ps(4555.0, 6.0, 7.0, 8.0), r);

let r = _mm_cvtsi32_ss(a, -322223333);
let e = _mm_setr_ps(-322223333.0, 6.0, 7.0, 8.0);
assert_eq_m128(e, r);
let r = $alias(a, 322223333);
assert_eq_m128(_mm_setr_ps(322223333.0, 6.0, 7.0, 8.0), r);

let r = $alias(a, -432);
assert_eq_m128(_mm_setr_ps(-432.0, 6.0, 7.0, 8.0), r);

let r = $alias(a, -322223333);
assert_eq_m128(_mm_setr_ps(-322223333.0, 6.0, 7.0, 8.0), r);
};
}

#[simd_test(enable = "sse")]
unsafe fn test_mm_cvtsi32_ss() {
test_mm_cvtsi32_ss_impl!(_mm_cvtsi32_ss);
}

#[simd_test(enable = "sse")]
unsafe fn test_mm_cvt_si2ss() {
test_mm_cvtsi32_ss_impl!(_mm_cvt_si2ss);
}

#[simd_test(enable = "sse")]
Expand All @@ -3071,18 +3092,24 @@ mod tests {
assert_eq_m128(r, _mm_setr_ps(4.25, 0.0, 0.0, 0.0));
}

macro_rules! test_mm_set1_ps_impl {
($alias:ident) => {
let r = $alias(black_box(4.25));
assert_eq!(get_m128(r, 0), 4.25);
assert_eq!(get_m128(r, 1), 4.25);
assert_eq!(get_m128(r, 2), 4.25);
assert_eq!(get_m128(r, 3), 4.25);
};
}

#[simd_test(enable = "sse")]
unsafe fn test_mm_set1_ps() {
test_mm_set1_ps_impl!(_mm_set1_ps);
}

#[simd_test(enable = "sse")]
const fn test_mm_set1_ps() {
let r1 = _mm_set1_ps(black_box(4.25));
let r2 = _mm_set_ps1(black_box(4.25));
assert_eq!(get_m128(r1, 0), 4.25);
assert_eq!(get_m128(r1, 1), 4.25);
assert_eq!(get_m128(r1, 2), 4.25);
assert_eq!(get_m128(r1, 3), 4.25);
assert_eq!(get_m128(r2, 0), 4.25);
assert_eq!(get_m128(r2, 1), 4.25);
assert_eq!(get_m128(r2, 2), 4.25);
assert_eq!(get_m128(r2, 3), 4.25);
unsafe fn test_mm_set_ps1() {
test_mm_set1_ps_impl!(_mm_set_ps1);
}

#[simd_test(enable = "sse")]
Expand Down Expand Up @@ -3171,11 +3198,22 @@ mod tests {
assert_eq_m128(r, _mm_setr_ps(42.0, 0.0, 0.0, 0.0));
}

macro_rules! test_mm_load1_ps_impl {
($alias:ident) => {
let a = 42.0f32;
let r = $alias(ptr::addr_of!(a));
assert_eq_m128(r, _mm_setr_ps(42.0, 42.0, 42.0, 42.0));
};
}

#[simd_test(enable = "sse")]
const fn test_mm_load1_ps() {
let a = 42.0f32;
let r = unsafe { _mm_load1_ps(ptr::addr_of!(a)) };
assert_eq_m128(r, _mm_setr_ps(42.0, 42.0, 42.0, 42.0));
unsafe fn test_mm_load1_ps() {
test_mm_load1_ps_impl!(_mm_load1_ps);
}

#[simd_test(enable = "sse")]
unsafe fn test_mm_load_ps1() {
test_mm_load1_ps_impl!(_mm_load_ps1);
}

#[simd_test(enable = "sse")]
Expand Down Expand Up @@ -3227,19 +3265,24 @@ mod tests {
assert_eq!(vals[2], 0.0);
}

#[simd_test(enable = "sse")]
const fn test_mm_store1_ps() {
let mut vals = Memory { data: [0.0f32; 4] };
let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);

// guaranteed to be aligned to 16 bytes
let p = vals.data.as_mut_ptr();
macro_rules! test_mm_store1_ps_impl {
($alias:ident) => {
let mut vals = Memory { data: [0.0f32; 4] };
let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
let p = vals.data.as_mut_ptr();
$alias(p, *black_box(&a));
assert_eq!(vals.data, [1.0, 1.0, 1.0, 1.0]);
};
}

unsafe {
_mm_store1_ps(p, *black_box(&a));
}
#[simd_test(enable = "sse")]
unsafe fn test_mm_store1_ps() {
test_mm_store1_ps_impl!(_mm_store1_ps);
}

assert_eq!(vals.data, [1.0, 1.0, 1.0, 1.0]);
#[simd_test(enable = "sse")]
unsafe fn test_mm_store_ps1() {
test_mm_store1_ps_impl!(_mm_store_ps1);
}

#[simd_test(enable = "sse")]
Expand Down
4 changes: 1 addition & 3 deletions crates/stdarch-verify/tests/x86-intel.rs
View file
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Original file line number Diff line number Diff line change
Expand Up @@ -214,7 +214,7 @@ fn verify_all_signatures() {
"_m_prefetchrs",
// CMPXCHG
"cmpxchg16b",
// Undefined
// Undefined,
"_mm_undefined_ps",
"_mm_undefined_pd",
"_mm_undefined_si128",
Expand Down Expand Up @@ -251,8 +251,6 @@ fn verify_all_signatures() {
"_mm_cvtt_ss2si",
"_mm_cvt_si2ss",
"_mm_set_ps1",
"_mm_load_ps1",
"_mm_store_ps1",
"_mm_bslli_si128",
"_mm_bsrli_si128",
"_bextr2_u32",
Expand Down