| CPU Interface | DRAM Interface | ||||||
|---|---|---|---|---|---|---|---|
| Port | Direction | Size | Description | Port | Direction | Size | Description |
clk |
in | 1 | Clock | main_csb |
out | 1 | Chip Select (Active Low) |
rst |
in | 1 | Reset | main_web |
out | 1 | Write Enable (Active Low) |
flush |
in | 1 | Flush | main_addr |
out | address_size | Address |
csb |
in | 1 | Chip Select (Active Low) | main_din |
out | word_size | Data Input |
web |
in | 1 | Write Enable (Active Low) | main_dout |
in | word_size | Data Output |
wmask |
in | word_size / write_size | Write mask | main_stall |
in | 1 | Stall |
addr |
in | address_size | Address | ||||
din |
in | word_size | Data Input | ||||
dout |
out | word_size | Data Output | ||||
stall |
out | 1 | Stall | ||||